STD12N10L n - channel 100v - 0.12 w - 12a to-252 low threshold power mos transistor n typical r ds(on) = 0.12 w n avalanche rugged technology n 100% avalanche tested n high current capability n 175 o c operating temperature n low threshold drive n for through-hole version contact sales office applications n high current, high speed switching n solenoid and relay drivers n motor control, audio amplifiers n dc-dc & dc-ac converters n automotive environment(injection, abs, air-bg, lampdrivers, etc.) ? internal schematic diagram november 1999 absolute maximum ratings symbol parameter value unit v ds drain-source voltage (v gs = 0) 100 v v dgr drain- gate voltage (r gs = 20 k w )100v v gs gate-source voltage 15 v i d drain current (continuous) at t c = 25 o c12a i d drain current (continuous) at t c = 100 o c8a i dm ( ) drain current (pulsed) 48 a p tot total dissipation at t c = 25 o c50w derating factor 0.33 w/ o c t stg storage temperature -65 to 175 o c t j max. operating junction temperature 175 o c ( ) pulse width limited by safe operating area type v dss r ds(on) i d STD12N10L 100 v < 0.15 w 12 a 1 3 dpak to-252 (suffix "t4") 1/9
thermal data r thj-case r thj-amb r thc-sink t l thermal resistance junction-case max thermal resistance junction-ambient max thermal resistance case-sink typ maximum lead temperature for soldering purpose 3 100 1.5 275 o c/w o c/w o c/w o c electrical characteristics (t case = 25 o c unless otherwise specified) off symbol parameter test conditions min. typ. max. unit v (br)dss drain-source breakdown voltage i d = 250 m a v gs = 0 100 v i dss zero gate voltage drain current (v gs = 0) v ds = max rating v ds = max rating t c = 125 o c 1 10 m a m a i gss gate-body leakage current (v ds = 0) v gs = 15 v 100 na on ( * ) symbol parameter test conditions min. typ. max. unit v gs(th) gate threshold voltage v ds = v gs i d = 250 m a 1 1.6 2.5 v r ds(on) static drain-source on resistance v gs = 10v i d = 6 a v gs = 5v i d = 6 a 0.12 0.17 0.15 0.2 w w i d(on) on state drain current v ds > i d(on) x r ds(on)max v gs = 10 v 12 a dynamic symbol parameter test conditions min. typ. max. unit g fs ( * ) forward transconductance v ds > i d(on) x r ds(on)max i d = 6 a 6.5 10 s c iss c oss c rss input capacitance output capacitance reverse transfer capacitance v ds = 25 v f = 1 mhz v gs = 0 800 150 50 pf pf pf STD12N10L 2/9
electrical characteristics (continued) switching on symbol parameter test conditions min. typ. max. unit t d(on) t r turn-on delay time rise time v dd = 50 v i d = 6 a r g = 4.7 w v gs = 5 v (resistive load, see fig. 3) 15 40 ns ns q g q gs q gd total gate charge gate-source charge gate-drain charge v dd = 80 v i d = 12 a v gs = 5 v 20 6 10 30 nc nc nc switching off symbol parameter test conditions min. typ. max. unit t r(voff) t f t c off-voltage rise time fall time cross-over time v dd = 80 v i d = 12 a r g = 4.7 w v gs = 5 v (inductive load, see fig. 5) 12 12 25 ns ns ns source drain diode symbol parameter test conditions min. typ. max. unit i sd i sdm ( ) source-drain current source-drain current (pulsed) 12 48 a a v sd ( * ) forward on voltage i sd = 12 a v gs = 0 1.5 v t rr q rr i rrm reverse recovery time reverse recovery charge reverse recovery current i sd = 12 a di/dt = 100 a/ m s v dd = 30 v t j = 150 o c (see test circuit, fig. 5) 145 580 8 ns m c a ( * ) pulsed: pulse duration = 300 m s, duty cycle 1.5 % ( ) pulse width limited by safe operating area STD12N10L 3/9
fig. 1: unclamped inductive load test circuit fig. 3: switching times test circuits for resistive load fig. 2: unclamped inductive waveform fig. 4: gate charge test circuit fig. 5: test circuit for inductive load switching and diode recovery times STD12N10L 4/9
dim. mm inch min. typ. max. min. typ. max. a 2.2 2.4 0.086 0.094 a1 0.9 1.1 0.035 0.043 a2 0.03 0.23 0.001 0.009 b 0.64 0.9 0.025 0.035 b2 5.2 5.4 0.204 0.212 c 0.45 0.6 0.017 0.023 c2 0.48 0.6 0.019 0.023 d 6 6.2 0.236 0.244 e 6.4 6.6 0.252 0.260 g 4.4 4.6 0.173 0.181 h 9.35 10.1 0.368 0.397 l2 0.8 0.031 l4 0.6 1 0.023 0.039 == d l2 l4 1 3 == b e == b2 g 2 a c2 c h a1 detail "a" a2 detail "a" to-252 (dpak) mechanical data 0068772-b STD12N10L 5/9
information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the co nsequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specification mentioned in this pu blication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectron ics products are not authorized for use as critical components in life support devices or systems without express written approval of stmicr oelectronics. the st logo is a trademark of stmicroelectronics ? 1999 stmicroelectronics C printed in italy C all rights reserved stmicroelectronics group of companies australia - brazil - china - finland - france - germany - hong kong - india - italy - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - u.s.a. http://www.st.com . STD12N10L 6/9
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